MIL-C-64030(AR)
4.5.2.3.7 Arm test. Depress and rotate the SAFE/ARM Switch
clockwise to the ARM position. Verify that the BATT OK, CUT OK
and DATA IN lights turn off. Use a multimeter to verify that the
voltage on Q23 anode (VHV) is less than 0.5 volt.
4.5.2.3.8 Quiescent current test. Within 283 seconds after
placing the SAFE/ARM Switch in the ARM position, use a multimeter.
to measure the current flowing into P1-RED (+14.4 VDC) with the
voltage set to 13 ± 0.5 V. Verify that the measured value is in
compliance with the requirement specified in 3.5.3.2.
4.5.2.3.9 Premature hardwire deploy test. At 285 ± 2 seconds
after placing the SAFE/ARM Switch in the ARM position, use a
storage scope to apply a pulse with an amplitude of 8 ± 0.2 volts
and a width of 1 ± 0.1 millisecond to E1 (HW1) with respect to E2
(HW2). After 7 seconds, use a multimeter verify that the voltage
at Q23 anode (VHV) is less than 0.5 volt.
4.5.2.3.10 Hardwire deploy test. At 315 ± 2 seconds after
placing the SAFE/ARM Switch in the ARM position, use a storage
scope to apply a pulse with an amplitude of 8 ± 0.2 volts and a
width of 1 + 0.1 millisecond to E1 (HW1) with respect to E2
(HW2) l Verify the following responses.
4.5.2.3.10.1 EBI pulses. Witht the EBI test loads specified
in 4.5.2.3.2.1 applied, use a storage scope to verify that the EBI
waveforms specified in 3.5.3.3 appear at the tube driver outputs.
4.5.2.3.10.2 High voltage supply test. At 20 + 10 seconds
after the pulse of 4.5.2.3.10 is applied, use a multimeter to
verify that the voltage on Q23 anode (VHV) is in compliance with
the requirements of 3.5.3.6.
4.5.2.3.10.3 FSD patten. With the FSD test loads specified
in 4. 5.2.3.2.1 applied, use a storage scope to verify that the FSD
sequence specified in 3.5.3.4 appears at the tube driver outputs.
4.5.2.3.10.4 Detonator driver Pulse. With the DET test loads
specified in 4.5.2.3.2.1 applied, verify that the waveforms at
J1-12 (DET1) with the respect to J1-24 (DET (R)) and J1-13 (DET2)
with respect to J1-25 (DET2(R)) meet the requirements of 3.5.3.5.
4.5.2.3.11 Accelerated arm sequence. Rotate the SAFE/ARM
switch clockwise to the SAFE position. Afer 5 seconds, rotate the
SAFE/ARM switch clockwise to the TEST position. Verify that the
BATT OK and CKT OK lights turn on. Connect A2E3 (TP3 on the
Digital Logic Card) to ground and rotate the SAFE/ARM switch
clockwise to the LOAD position. Load a valid FSD pattern, as
defined on Drawing 9333026, into the Control Indicator by applying
the pattern to J1-1 (MCD1) with respect to J1-14 (MCD2) as shown
in figure 8. Verify that the DATA IN light turns on. Depress and
rotate the SAFE/ARM switch to the ARM position. After 10 seconds,
remove the ground from A2E3 (TP3 on the DLC). Verify that the
BATT OK, CKT OK and DATA In lights are off.
93
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